The present invention relates to a method and circuit for producing a time integral of a signal voltage, and, more particularly, where charge samples of the signal voltage are stored in a sampling capacitance and discharged into an integrating capacitance at a predetermined switching interval.
The voltage integrator is an ordinary circuit implemented, for example, using the CMOS technique. This is demonstrated by a prior art circuit shown in FIG. 1a using an operational amplifier. FIG. 1b shows an alternative prior art implementation using capacitors switched in discrete time. The output signal Uo of the integrators shown in FIG. 1a is the time integral of the input voltage Ui. The integral is derived according to following the formula: EQU Uo(t)=-(1/RC).intg..sup.t.sub.o Ui(t)dt
Similarly, the output signal Uo of the integrator shown in FIG. 1b is derived: EQU Uo(t).apprxeq.fs.multidot.(Ci/Co).intg..sup.t.sub.o Ui(t)dt
where fs is the sampling frequency. When switches s1 and s4 are closed, and switches s2 and s3 are open, the sampling capacitance Ci stores a charge sample of the input signal. The sample charge (Qi=Ci.times.Ui) is discharged in the integrating capacitor Co by closing the switches s2 and s3 and switches s1 and s4 are open. There may be pauses between the sample storing and sample discharge stages when all four switches are open.
A drawback of these prior art circuits is that the amplifier continuously consumes power. Moreover, the amplifier's bandwidth is limited in proportion to this power consumption, and the CMOS implementation is susceptible to 1/f noise.